IP-UD-I is a single-wide IndustryPack® (IP) that provides 24 buffered TTL digital
I/O lines with high current output drivers and wide voltage range inputs. All 24 lines
can generate interrupts. Outputs will sink up to 64 mA of continuous load current.
Inputs will handle up to +15/-5V with a 1.25 V logic threshold for direct CMOS/TTL
compatibility. Each line may be dynamically and individually configured for either
input or output, providing maximum flexibility. Inputs and outputs may be doublebuffered,
making the IP compatible with simulation systems requiring many inputs
and outputs to be latched simultaneously.
Interrupts are supported by five registers. Interrupts for each line may be individually
masked and its edge polarity programmed. Logic ensures that edges are not missed
while the polarity is being programmed.
Writing a one to any line turns off the output driver, allowing a passive pull up resistor
to set the line to a logic high. Writing a zero to any line turns on the driver, driving the
line to logic low. For input use, a one is written to the corresponding line—this is the
power up default. For output use, the binary value desired is written to the
corresponding line.
Input and output lines may be double-buffered by providing an external clock. A bit in
the Control Register selects the polarity of this clock, allowing inputs and outputs to
be latched on either the rising or falling clock edge. IP-UD-I is ideally suited for
generating this clock; however, any CMOS/TTL-compatible clock source may be
used.
IP-UD-I can function in a Master/Slave Mode for synchronizing multiple IPs. In this
mode, the Master IP re-drives the external clock source out I/O line 23. This line
becomes the Master Clock, which should be wired to I/O line 24 on the Master and
all Slave IPs.
Reset turns off the open collector output driver and sets/disables double-buffering for
a consistent software interface.
IP-UD-I is ideal for industrial automation, communications and transportation
applications.
Features
- 24 buffered TTL digital I/O lines on a single-wide IndustryPack
- All lines individually programmable to generate interrupts
- 64mA +15/-5V operation
- Each line programmable as input or output
- Double-buffered input and output
- Cascadable external clock triggers double-buffering
- Windows NT driver available
Ordering Options
| Manuf. Part No. | | Product Description |
| IP-UD-I | | IndustryPack with 24 buffered TTL-level I/O lines & interrupts |
| C-CM50M-IP50M | | Three-foot Champ50 male to ribbon cale |
| C-HD50M-HD50M | | Six-foot HD50 male to HD50 male |
| C-HD50M-CM50M | | Six-foot Champ50 male to DH50 male cable |
| IP-TERM | | 50-screw terminal block with ribbon cable connector |
| IP-TERM-HD50 | | 50-screw terminal block with HD50 female connector |
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