The TPMC863 is a standard single-width 32-bit PMC with four high speed serial data communication channels. It is the successor of the discontinued TPMC862, providing similar functionality and full connector and pin-out compatibility.
The serial communication controller is implemented in FPGA logic, along with the bus master capable PCI interface, guaranteeing long term availability and having the option to implement additional functions in the future.
Each channel has receive and transmit FIFOs of 512 long words (32 bit) per channel for high data throughput.
Data transfer on the PCI bus is handled via TPMC863 initiated DMA cycles with minimum host/CPU intervention.
Several serial communication protocols are supported by each channel, such as asynchronous, isochronous, synchronous and HDLC mode.
A 14.7456 MHz oscillator provides standard asynchronous baud rates. A 24 MHz and a 10 MHz oscillator are provided for other (synchronous) baud rates.
Each channel provides various interrupt sources, generated on INTA. The interrupt sources can be enabled or disabled individually.
Multiprotocol transceivers are used for the line interface. The physical interface is selectable by software, individually for each channel as EIA-232, EIA-422, EIA 449, EIA-530, EIA-530A, V.35, V.36 or X.21.
The following signals are provided by the TPMC863 for each channel at the front panel I/O via an HD68 SCSI-3 type connector and at rear I/O via P14 connector:
Receive Data (RxD +/-), Transmit Data (TxD +/-), Receive Clock (RxC +/-), Transmit Clock (TxC +/-), Ready-To-Send (RTS +/-), Clear-To-Send (CTS +/-), Carrier-Detect (CD +/-) and GND. Additionally serial channel 3 provides Data-Set-Ready (DSR3 +/-) and Data-Terminal-Ready (DTR3 +/-) at the front I/O connector.
A serial EEPROM is used to store detailed board information by software and special configuration parameters.
Features
- Standard single-width 32 bit PMC module conforming to IEEE P1386.1
- 4 channels high speed serial data communication
- A wide range of I/O interfaces individually programmable for each channel
- Several communication protocols
- asynchronous (with oversampling)
- isochronous
- HDLC
- 512 longword FIFO (512 x 32 bit) per channel
- DMA support
- Different signal encodings (NRZ, NRZI, FM0, FM1 and Manchester)
- Multiple clock sources (for a wide bitrate spectrum)
- Front panel I/O via HD68 SCSI-3 type connector
- Rear I/O via P14
Ordering Options
| Manuf. Part No. | | Product Description |
| TPMC863-10R | | 4 Channel High Speed Synch/Asynch Serial Interface |
Software and Documentation
| TPMC863-DOC | | User Manual for TPMC863 |
| TDRV009-SW-25 | | Integrity Software Support: Device driver; Source code; Programmer documentation |
| TDRV009-SW-42 | | VxWorks Software Support: Legacy and VxBus-enabled Software Support; VxWorks Device driver; Source code; Programmer documentation |
| TDRV009-SW-65 | | Windows Software Support: Device driver; Programmer documentation |
| TDRV009-SW-82 | | Linux Software Support: Device driver; Source code; Programmer documentation |
| TDRV009-SW-95 | | QNX Software Support: Device driver; Source code; Programmer documentation |
Accessories
| Manuf. Part No. | | Product Description |
| TA104 | | HD68 / SCSI-3 Cable |
| TA203 | | HD68 / SCSI-3 Terminal Block |
| TA304 | | Cable Kit for Modules with HD68 / SCSI-3 Connector |
| TPIM005 | | PIM I/O Module with HD68 SCSI-3 type connector |
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